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DEBUG MONITOR USER'S MANUAL MOTOROLA
6-1 M68332BUG
DEBUG MONITOR USER'S MANUAL MOTOROLA
M68332BUG 6-1
CHAPTER 6
332Bug DIAGNOSTIC FIRMWARE GUIDE
6.1 INTRODUCTION
This diagnostic guide contains operation information for the 332Bug Diagnostic Firmware
Package, hereafter referred to as 332Diag. Paragraph 6.3 describes utilities available to the
user. Paragraphs 6.4 through 6.6 are guides to using each test.
6.2 DIAGNOSTIC MONITOR
The tests described herein are called via a common diagnostic monitor, hereafter called
monitor. This monitor is command-line driven and provides input/output facilities, command
parsing, error reporting, interrupt handling, and a multi-level directory.
6.2.1 Monitor Start-Up
At the 332Bug> prompt, enter SD to switch to the diagnostics directory. The Switch
Directories (SD) command is described elsewhere in this chapter. The prompt should now
read 332Diag>.
6.2.2 Command Entry and Directories
Enter commands at the 332Diag> prompt. The command name is entered before pressing
the carriage return <CR>. Multiple commands may be entered. If a command expects
parameters and another command is to follow it, separate the two with an exclamation point
(!). For instance, to execute the MT B command after the MT A command, the command line
would read MT A ! MT B. Spaces are not required but are shown here for legibility. Several
commands may be combined on one line.
Commands are listed in the diagnostic directory. Some commands have sub-command
which are listed in the directory for that particular command (see example below).
To execute a particular test, for example CPU, enter CPU X (X = the desired sub-command).
This command causes the monitor to find the CPU subdirectory, and then execute the
specified command from that subdirectory.
EXAMPLES:
Single-Level Commands HE Help
DE Display Error Counters
Two-Level Commands CPU CPU Tests for the MC68332
A Register Test
6.2.3 Help (HE)
On-line documentation is provided in the form of a Help command (syntax: HE [command
name]). This command displays a menu of the top level directory if no parameters are
entered, or a menu of each subdirectory if the name of that subdirectory is entered. For
example, to bring up a menu of all the memory tests, enter HE MT. When a menu is too long
to fit on the screen, it pauses until the operator presses the carriage return (<CR>) before
displaying the next screen.
6.2.4 Self Test (ST)
The monitor provides an automated test mechanism called self test. Entering ST + command
causes the monitor to run only the tests included in that command. Entering ST - command
runs all the tests included in an internal self-test directory except the command listed. ST
without any parameters runs the entire directory, which contains most of the diagnostics.
Each test for each particular command is listed in the paragraph pertaining to the command.
6.2.5 Switch Directories (SD)
To exit the diagnostic directory (and disable the diagnostic tests), enter SD. This terminates
the diagnostic commands and initializes the 332Bug commands. When in the 332Bug
directory, the prompt is 332Bug>. To return to the diagnostic directory, enter the SD
command. When in the diagnostic directory, the prompt is 332Diag>. This feature allows
the user to access 332Bug without the diagnostics being visible.
6.2.6 Loop-On-Error Mode (LE)
Use the Loop-on-error mode (LE) to endlessly repeat a test at the point where an error is
detected. This is useful when using a logic analyzer to trouble-shoot test failures. Enter LE
and the test name to loop on errors encountered during the test.
6.2.7 Stop-On-Error Mode (SE)
Use the stop-on-error mode (SE) to halt a test at the point where an error is detected. Enter
SE then the test mnomonic to stop on errors encountered during the test.
6.2.8 Loop-Continue Mode (LC)
Use loop-continue mode (LC) to endlessly repeat a test or series of tests. This command
repeats testing of everything on the command line. To terminate the loop, press the BREAK
key on the diagnostic video display terminal. Certain tests disable the BREAK key interrupt,
so pressing the ABORT or RESET switches on the M68332PFB platform board may become
necessary.
EXAMPLE:
332Diag>LC ST<CR> Repeats self test (ST) command to continuously test
the system.
6.2.9 Non-Verbose Mode (NV)
The diagnostics display a substantial number of error messages when an error is detected.
Non-verbose mode (NV) suppresses all messages except PASSED or FAILED. At the
prompt enter NV, the test name, and <CR>. NV ST MT causes the monitor to run the MT
self-test, but show only the names of the sub-tests and the results (pass/fail).
6.2.10 Display Error Counters (DE)
Each test in the diagnostic monitor has a dedicated error counter. As errors are encountered
in a particular test, its error counter is incremented. If one were to run a self-test or a series of
tests, the test results could be determined by examining the error counters. Entering DE, the
test name, and a <CR> displays the results of a particular test. Only nonzero values are
displayed.
6.2.11 Clear (Zero) Error Counters (ZE)
The error counters, at start-up, initialize to a value of zero, but it may be necessary to reset
them to zero after errors have accumilated. The ZE command resets all error counters to
zero. The error counters can be individually reset by entering the specific test name following
the command. Example: ZE CPU A clears the error counter associated with CPU A.
6.2.12 Display Pass Count (DP)
A count of the number of passes in loop-continue mode is kept by the monitor. This count is
displayed with other information at the conclusion of each pass. To display this information
without using LC, enter DP.
6.2.13 Zero Pass Count (ZP)
Executing this command resets the pass counter DP to zero. This is frequently desirable
before entering a command that executes the loop-continue mode. Entering this command
on the same line as LC results in the pass counter being reset every pass.
6.3 UTILITIES
The monitor is supplemented by several utilities that are separate and distinct from the
monitor itself and the diagnostics.
6.3.1 Write Loop
WL.<SIZE> [<ADDR> [<DEL><DATA>]]
The WL command executes a streamlined write of specified size to a specified memory
location. This command is intended as a debugging aid once specific fault areas are
identified. The write loop is very short in execution so measuring devices such as
oscilloscopes may be utilized in tracking failures. Pressing the BREAK key does not
terminate this command, but pressing the ABORT switch or RESET switch does.
Command size must be specified as B for byte, W for word, or L for longword.
The command requires two parameters: target address and data to be written. The address
and data are both hexadecimal values and must not be preceded by a $. To write $00 out to
address $10000, enter WL.B 10000 00. The system prompts the user if either or both
parameters are omitted.
EXAMPLES:
332Bug>SD<CR> Switch to diagnostic directory
332Diag>WR.W<CR> Prompts for address and data to
which to write word value.
332Diag>WR.B 40FC E6<CR> Writes $E6 to $40FC
332Diag>WR.W 800C 43F6<CR> Writes $43F6 to $800C
332Diag>WR.L 54F0 F8432191<CR> Writes $F8432191 to $54F0
6.3.2 Read Loop
RL.<SIZE> [<ADDR> [<DEL><DATA>]]
The RL command executes a streamlined read of specified size from a specified memory
location. This command is intended as a debugging aid once specific fault areas are
identified. The read loop is very short in execution so measuring devices such as
oscilloscopes may be utilized in tracking failures. Pressing the BREAK key does not
terminate this command, but pressing the ABORT switch or RESET switch does.
Command size must be specified as B for byte, W for word, or L for longword.
The command requires one parameter: target address. The address is a hexadecimal value.
To read from address $10000, enter RL.B 10000. The system prompts the user if the
parameter is omitted.
EXAMPLES:
332Diag>RL.B<CR> Prompts for address from which to
read byte value
332Diag>RL.W A000<CR> Read longword at $A000
6.3.3 Write/Read Loop
WR.<SIZE> [<ADDR> [<DEL><DATA>]]
The WR command executes a streamlined write and read of specified size to a specified
memory location. This command is intended as a debugging aid once specific fault areas
are identified. The write/read loop is very short in execution so measuring devices such as
oscilloscopes may be utilized in tracking failures. Pressing the BREAK key does not
terminate this command, but pressing the ABORT switch or RESET switch does.
Command size must be specified as B for byte, W for word, or L for longword.
The command requires two parameters: target address and data to be written. The address
and data are both hexadecimal values and must not be preceded by a $. To write $00 out to
address $10000 and read back, enter WR.B 10000 00. The system prompts the user if
either or both parameters are omitted.
EXAMPLE:
332Diag>WR.W 8000 FFFFFFFF<CR> Writes longword $FFFFFFFF to
location $8000 and reads it back
CPU CPU Tests For The MC68332 CPU
6.4 CPU TESTS FOR THE MC68332
CPU tests are a series of diagnostics provided to test the MC68332 MPU, as listed in Table 6-
1.
TABLE 6-1. MC68332 CPU Diagnostic Tests
MONITOR COMMAND TITLE
CPU A Register Test
CPU B Instruction Test
CPU C Address Mode Test
CPU D Exception Processing Test
The normal procedure for correcting an CPU error is to replace the MC68332 micro-controller
unit.
CPU A Register Test CPU A
6.4.1 Register Test
332Diag>CPU A
CPU A executes a thorough test of all the registers in the MC68332 chip, including checking
for bits stuck high or low.
EXAMPLE:
After the command has been issued, the following line is printed:
A CPU Register test........................Running ---------->
If any part of the test fails, then the display appears as follows.
A CPU Register test........................Running ---------->..... FAILED
(error message)
Here, (error message) is one of the following:
Failed DO-D7 register check
Failed SR register check
Failed USP/VBR/CAAR register check
Failed CACR register check
Failed AO-A4 register check
Failed A5-A7 register check
If all parts of the test are completed correctly, then the test passes.
A CPU Register test........................Running ----------> PASSED
CPU B Instruction Test CPU B
6.4.2 Instruction Test
332Diag>CPU B
CPU B tests various data movement, integer arithmetic, logical, shift and rotate, and bit
manipulation instructions of the MC68332 chip.
EXAMPLE:
After the command has been issued, the following line is printed:
B CPU Instruction Test ....................Running ---------->
If any part of the test fails, then the display appears as follows.
B CPU Instruction Test.....................Running ---------->..... FAILED
(error message)
Here, (error message) is one of the following:
Failed AND/OR/NOT/EOR instruction check
Failed DBF instruction check
Failed ADD or SUB instruction check
Failed MULU or DIVU instruction check
Failed BSET or BCLR instruction check
Failed LSR instruction check
Failed LSL instruction check
If all parts of the test are completed correctly, then the test passes.
B CPU Instruction Test.....................Running ----------> PASSED
CPU C Address Mode Test CPU C
6.4.3 Address Mode Test
332Diag>CPU C
CPU C tests the various addressing modes of the MC68332 chip. These include absolute
address, address indirect, address indirect with post-increment, and address indirect with
index modes.
EXAMPLE:
After the command has been issued, the following line is printed:.
C CPU Address Mode test....................Running ---------->
If any part of the test fails, then the display appears as follows.
C CPU Address Mode test....................Running ---------->..... FAILED
(error message)
(error message) is one of the following:
Failed Absolute Addressing check
Failed Indirect Addressing check
Failed Post increment check
Failed Pre decrement check
Failed Indirect Addressing with Index check
Unexpected Bus Error at $XXXXXXXX
If all parts of the test are completed correctly, then the test passes.
C CPU Address Mode test....................Running ----------> PASSED
CPU D Exception Processing Test CPU D
6.4.4 Exception Processing Test
332Diag>CPU D
CPU D tests many of the exception processing routines of the MC68332, but not the interrupt
auto vectors or any of the floating point co-processor vectors.
EXAMPLE:
After the command has been issued, the following line is printed:
D CPU Exception Processing Test............Running ---------->
If any part of the test fails, then the display appears as follows.
D CPU Exception Processing Test............Running ---------->-----FAILED
Test Failed Vector # XXX
# XXX is the hexadecimal exception vector offset, as explained in the CPU32
Reference Manual.
However, if the failure involves taking an exception different from that being
tested, the display is:
D CPU Exception Processing Test............Running ---------->..... FAILED
Unexpected exception taken to Vector # XXX
If all parts of the test are completed correctly, then the test passes.
D CPU Exception Processing Test............Running ----------> PASSED
MT Memory Tests MT
6.5 MEMORY TESTS (MT)
The memory tests are a series of diagonistics which verify random access memory
(read/write) that may or may not reside on the M68332EVS evaluation system. Default is the
BCC on-board RAM. To test off-board RAM, change Start and Stop Addresses per MT B and
MT C as described in the following paragraphs. Memory tests are listed in Table 6-2.
NOTE
If one or more memory tests are attempted at an address where there is no
memory, a bus error message appears, giving the details of the problem.
TABLE 6-2. Memory Diagnostic Tests
MONITOR COMMAND TITLE
MT A Set Function Code
MT B Set Start Address
MT C Set Stop Address
MT D Set Bus Data Width
MT E March Address Test
MT F Walk a Bit Test
MT G Refresh Test
MT H Random Byte Test
MT I Program Test
MT J TAS Test
The following hardware is required to perform these tests.
Ñ M68332EVS - Module being tested
Ñ Video display terminal or host computer
MT A Set Function Code MT A
6.5.1 Set Function Code
332Diag>MT A [new value]
MT A allows the user to select the function code in most of the memory tests. The exceptions
to this are Program Test and TAS Test.
EXAMPLE:
If the user supplied the optional new value, then the display appears as follows:
332Diag>MT A [new value]<CR>
Function Code=<new value>
332Diag>
If a new value was not specified by the user, then the old value is displayed all
and the user is allowed to enter a new value.
NOTE
The default is Function Code=5, which is for on-board RAM.
332Diag>MT A<CR>
Function Code=<current value> ?[new value]<CR>
Function Code=<new value>
332Diag>
This command may be used to display the current value without changing it by
pressing a carriage return <CR> without entering the new value.
332Diag>MT A<CR>
Function Code=<current value> ?<CR>
Function Code=<current value>
332Diag>
MT B Set Start Address MT B
6.5.2 Set Start Address
332Diag>MT B [new value]
MT B allows the user to select the start address used by all of the memory tests. For the
MVME332, it is suggested that address $00003000 be used. Other addresses may be used,
but extreme caution should be used when attempting to test memory below this address.
EXAMPLE:
If the user supplied the optional new value, then the display appears as follows:
332Diag>MT B [new value]<CR>
Start Addr.=<new value>
332Diag>
If a new value was not specified by the user, then the old value is displayed and
the user is allowed to enter a new value.
NOTE
The default is Start Addr.=00003000, which is for on-board RAM.
332Diag>MT B<CR>
Start Addr.=<current value> ?[new value]<CR>
Start Addr.=<new value>
332Diag>
This command may be used to display the current value without changing it by
pressing a carriage return <CR> without entering the new value.
332Diag>MT B<CR>
Start Addr.=<current value> ?<CR>
Start Addr.=<current value>
332Diag>
NOTE
If a new value is specified, it is truncated to a longword boundary
and, if greater than the value of the stop address, replaces the stop
address. The start address is never allowed higher in memory
than the stop address. These changes occur before another
command is processed by the monitor.
MT C Set Stop Address MT C
6.5.3 Set Stop Address
332Diag>MT C [new value]
MT C allows the user to select the stop address used by all of the memory tests. The stop
address is the address where testing terminates, so the stop address must be set to the last
address +1.
EXAMPLE:
If the user supplied the optional new value, then the display appears as follows:
332Diag>MT C [new value]<CR>
Stop Addr.=<new value>
332Diag>
If a new value was not specified by the user, then the old value is displayed and
the user is allowed to enter a new value.
NOTE
The default is Stop Addr.=00010000, which is the end of on-board
RAM.
332Diag>MT C
Stop Addr.=<current value> ?[new value]<CR>
Stop Addr.=<new value>
332Diag>
This command may be used to display the current value without changing it by
pressing a carriage return <CR> without entering the new value.
332Diag>MT C
Start Addr.=<current value> ?<CR>
Start Addr.=<current value>
332Diag>
NOTE
If a new value is specified, it is truncated to a longword boundary
and, if less than the value of the start address, is replaced by the
start address. The stop address is never allowed to be lower in
memory than the start address. These changes occur before
another command is processed by the monitor.
MT D Set Bus Data Width MT D
6.5.4 Set Bus Data Width
332Diag>MT D [new value: 0 for 16, 1 for 32]
MT D selects either 16-bit or 32-bit bus data accesses during the M68332Bug MT memory
tests. The width is selected by entering zero for 16 bits or one for 32 bits.
EXAMPLE:
If the user supplied the optional new value, then the display appears as follows:
332Diag>MT D [new value]<CR>
Bus Width (32=1/16=0) =<new value>
332Diag>
If a new value was not specified by the user, then the old value is displayed and
the user is allowed to enter a new value.
NOTE
The default value is Bus Width (32=1/16=0) =1.
332Diag>MT D<CR>
Bus Width (32=1/16=0) =<current value> ?[new value]<CR>
Bus Width (32=1/16=0) =<new value>
332Diag>
This command may be used to display the current value without changing it by
pressing a carriage return <CR> without entering the new value.
332Diag>MT D<CR>
Bus Width (32=1/16=0) =<current value> ?<CR>
Bus Width (32=1/16=0) =<current value>
332Diag>
MT E March Address Test MT E
6.5.5 March Address Test
332Diag>MT E
MT E performs a march address test from Start Address to Stop Address. The march
address test has been implemented in the following manner:
Step 1 All memory locations from Start Address up to Stop Address are
cleared to 0.
Step 2 Beginning at Stop Address and proceeding downward to Start
Address, each memory location is checked for bits that did not clear
and then the contents are changed to all F's (all the bits are set). This
process reveals address lines that are stuck high.
Step 3 Beginning at Start Address and proceeding upward to Stop Address,
each memory location is checked for bits that did not set and then the
memory location is again cleared to 0. This process reveals address
lines that are stuck low.
EXAMPLE:
After the command is entered, the display should appear as follows:
E MT March Addr. Test......................Running ---------->
If an error is encountered, then the memory location and other related
information are displayed.
E MT March Addr. Test......................Running ---------->..... FAILED
(error-related information)
If no errors are encountered, then the display appears as follows:.
E MT March Addr. Test......................Running ----------> PASSED
MT F Walk a Bit Test MT F
6.5.6 Walk a Bit Test
332Diag>MT F
MT F performs a walking bit test from start address to stop address. The walking bit test for
each memory location is implemented in the following manner:
Ñ Write out a 32-bit value with only the lower bit set.
Ñ Read it back and verify that the value written equals the one read. Report any
errors.
Ñ Shift the 32-bit value to move the bit up one position.
Ñ Repeat the procedure (write, read, and verify) for all 32-bit positions.
EXAMPLE:
After the command is entered, the display should appear as follows:
F MT Walk a bit Test ......................Running ---------->
If an error is encountered, then the memory location and other related
information are displayed.
F MT Walk a bit Test ......................Running ---------->..... FAILED
(error-related information)
If no errors are encountered, then the display appears as follows:
F MT Walk a bit Test ......................Running ----------> PASSED
MT G Refresh Test MT G
6.5.7 Refresh Test
332Diag>MT G
MT G performs a refresh test from Start Address to Stop Address. The refresh test has been
implemented in the following manner:
Step 1. For each memory location:
Ñ Write out value $FC84B730.
Ñ Verify that the location contains $FC84B730.
Ñ Proceed to next memory location.
Step 2. Delay for 500 milliseconds (1/2 second).
Step 3. For each memory location:
Ñ Verify that the location contains $FC84B730.
Ñ Write out the complement of $FC84B730 ($037B48CF).
Ñ Verify that the location contains $037B48CF.
Ñ Proceed to next memory location.
Step 4. Delay for 500 milliseconds.
Step 5. For each memory location:
Ñ Verify that the location contains $037B48CF.
Ñ Write out value $FC84B730.
Ñ Verify that the location contains $FC84B730.
Ñ Proceed to next memory location.
EXAMPLE:
After the command is entered the display should appear as follows:
G MT Refresh Test..........................Running ---------->
If an error is encountered, then the memory location and other related
information are displayed.
G MT Refresh Test..........................Running ---------->..... FAILED
(error-related information)
If no errors are encountered, then the display appears as follows:
G MT Refresh Test..........................Running ----------> PASSED
MT H Random Byte Test MT H
6.5.8 Random Byte Test
332Diag>MT H
MT H performs a random byte test from Start Address to Stop Address. The random byte test
has been implemented in the following manner:
Step 1. A register is loaded with the value $ECA86420.
Step 2. For each memory location:
Ñ Copy the contents of the register to the memory location, one byte at
a time.
Ñ Add $02468ACE to the contents of the register.
Ñ Proceed to next memory location.
Step 3. Reload $ECA86420 into the register.
Step 4. For each memory location:
Ñ Compare the contents of the memory to the register to verify that the
contents are good, one byte at a time.
Ñ Add $02468ACE to the contents of the register.
Ñ Proceed to next memory location.
EXAMPLE:
After the command is entered, the display should appear as follows:
H MT Random Byte Test......................Running ---------->
If an error occurs, then the memory location and other related information are
displayed.
H MT Random Byte Test......................Running ---------->..... FAILED
(error-related information)
If no errors occur, then the display appears as follows:
H MT Random Byte Test......................Running ----------> PASSED
MT I Program Test MT I
6.5.9 Program Test
332Diag>MT I
MT I moves a program segment into RAM and executes it. The implementation of this is as
follows:
Step 1. The program is moved into the RAM, repeating it as many times as
necessary to fill the available RAM (i.e., from Start Address to Stop
Address-8). Only complete segments of the program are moved. The
space remaining from the last program segment copied into the RAM to
Stop Address-8 is filled with NOP instructions. Attempting to run this
test without sufficient memory (around 400 bytes) for at least one
complete program segment to be copied causes an error message to
be printed out: INSUFFICIENT MEMORY.
Step 2. The last location, Stop Address, receives an RTS instruction.
Step 3. Finally, the test performs a JSR to location Start Address.
Step 4. The program itself performs a wide variety of operations, with the
results frequently checked and a count of the errors maintained.
locations are reported in the same fashion as any memory test failure
(refer to paragraph 6.8.13).
EXAMPLE:
After the command is entered, the display should appear as follows:
I MT Program Test..........................Running ---------->
If the operator has not allowed enough memory for at least one program
segment to be copied into the target RAM, then the following error message is
printed. To avoid this, make sure that the Stop Address is at least 388 bytes
($00000184) greater than the Start Address.
I MT Program Test........................Running ---------->
Insufficient Memory
PASSED
If the program (in RAM) detects any errors, then the location of the error and
other information is displayed.
I MT Program Test........................Running ---------->..... FAILED
(error-related information)
If no errors occur, then the display appears as follows:
I MT Program Test..........................Running ----------> PASSED
MT J Test and Set Test MT J
6.5.10 Test and Set Test
332Diag>MT J
MT J performs a Test and Set (TAS) test from Start Address to Stop Address. The test for
each memory location is implemented as follows:
Ñ Clear the memory location to 0.
Ñ Test And Set the location (should set upper bit only).
Ñ Verify that the location now contains $80.
Ñ Proceed to next location (next byte).
EXAMPLE:
After the command is entered, the display should appear as follows:
J MT TAS Test..............................Running ---------->
If an error occurs, then the memory location and other related information are
displayed.
J MT TAS Test..............................Running ---------->..... FAILED
(error-related information)
If no errors occur, then the display appears as follows:
J MT TAS Test..............................Running ----------> PASSED
6.5.11 Description of Memory Error Display Format
This paragraph is included to describe the format used to display errors during memory test E
through L.
The error reporting code is designed to conform to two rules:
a. The first time an error occurs, headings are printed out prior to the printing of
the values.
b. Upon 20 memory errors, the printing of error messages ceases for the
remainder of the test.
The following is an example of the display format:
FC TEST ADDR 10987654321098765432109876543210 EXPECTED READ
5 00010000 -----------------------X-------- 00000100 00000000
5 00010004 -------------------X-------X---- FFFFEFFF FFFFFFEF
Each line displayed consists of five items: function code, test address, graphic bit report,
expected data, and read data. The test address, expected data, and read data are displayed
in hexadecimal. The graphic bit report shows a letter X at each errant bit position and a dash
(-) at each good bit position.
The heading used for the graphic bit report is intended to make the bit position easy to
determine. Each numeral in the heading is the one's digit of the bit position. For example,
the leftmost bad bit at test address $10004 has the numeral 2 over it. Because this is the
second 2 from the right, the bit position is read 12 in decimal (base 10).
BERR Bus Error Test BERR
6.6 BUS ERROR TEST
332Diag>BERR
BERR tests for local bus time-out and global bus time-out bus error conditions, including the
following:
Ñ No bus error by reading from ROM
Ñ Local bus time-out by reading from an undefined FC location
Ñ Local bus time-out by writing to an undefined FC location
EXAMPLE:
After the command has been issued, the following line is printed:
BERR Bus Error Test...........................Running ---------->
If a bus error occurs in the first part of the test, then the test fails and the display
appears as follows.
BERR Bus Error Test...........................Running ---------->..... FAILED
Got Bus Error when reading from ROM
If no bus error occurs in one of the other parts of the test, then the test fails and
the appropriate error message appears as one of the following:
No Bus Error when reading from BAD address space
No Bus Error when writing to BAD address space
If all three parts of the test are completed correctly, then the test passes.
BERR Bus Error Test............................Running ----------> PASSED